On September 12, Apple not only announced a new iPhone, but also their new system-on-a-chip (SoC), the Apple A6. As it turns out, the A6 may be Apple’s first truly custom chip design.
“The A6 is the first Apple SoC to use its own ARMv7 based processor design. The CPU core(s) aren’t based on a vanilla A9 or A15 design from ARM IP, but instead are something of Apple’s own creation.”
The Reader’s Digest condensed version is that this allows Apple to customize the chip’s performance to their needs rather than fitting it into ARM’s designs. As always, MUCH more information is available at the AnandTech link above.
The cache sizes haven’t changed, but the clock speed has. Apple had clocked its A4 and A5 CPU cores(s) at 800MHz, but the Geekbench results point to a 25% increase on clock speed, so we’re looking at a dual-core 1GHz chip.
AnandTech also believes that the cache and memory interfaces have been significantly overhauled. Perhaps an additional load port, or deeper buffers.
Peak memory bandwidth utilization has also been improved. While the 4S couldn’t hit 50% of peak bandwidth, it looks like the iPhone 5 can hit over 70% of it’s peak memory bandwidth.
On average, you can see around 2.2x scaling from the 4S to the 5 in Geekbench’s integer tests. There’s no major improvement in multicore scaling, confirming what Geekbench says that it’s a two core/two thread machine.
AnandTech goes into much more exquisite detail than we can here, so for all you tech geeks among us, go to the article at AnandTech for all the facts and figures.
